JProbeC166 - OCDS Debugging Tool for Infineon C166 Family

JProbeC166

JProbeC166 - OCDS Debugging Tool The JProbeC166 is an OCDS Level 1 based debug tool. OCDS stands for "On Chip Debug Support". It is a debug port specified by Infineon. A lot of Infineon's new 16 bit controllers are equipped with OCDS and can be supported by the JProbeC166 (list of supported derivatives).

Due to the standardized debug interface the JProbeC166 is already prepared for upcoming devices and can easily be upgraded by software.

Product highlights:

HiTOP HLL Debugger
5 V, 3 V and 2.5 V support
Support of maximum frequency (50 MHz)
On-the-fly access to any memory location or internal register in real-time
OCDS hardware breakpoints
Virtually unlimited software breakpoints
Range events

Task-specific debugging

User Interface	HiTOP - The Ultimate User Interface for Embedded Developers the powerful Hitex high-level language debugger
Host Interface	LPT-direct Interface Interface to parallel port of PC (LPT)
Adapter Solutions	Adaptation solutions for DProbeXC and JProbeXC