FuSa RTS
Arm FuSa RTS consists of a set of embedded software components suitable for use in the most safety-critical automotive, medical and industrial applications. FuSa RTS provides developers with a robust real-time operating system (RTOS), an independent processor abstraction layer, and a verified C library that have been highly optimized for Cortex-M processors by Arm architectural experts. FuSa RTS, while available as a separately licensable product, integrates perfectly with the Arm Keil MDK and leverages the safety-qualified Arm C/C++ compiler to greatly simplify the system design, development, validation and certification processes for safety applications.
Arm FuSa RTS is certified for the following safety standards:
- Automotive: ISO26262, ASIL D
- Industrial: IEC61508, SIL 3
- Railway: EN50128, SIL 4
- Medical: IEC62304, Class C
FuSa RTS fully utilizes advanced hardware features that Arm specifies for its processors.
It provides support for devices with the following Arm Cortex-M cores:
- Cortex-M0/M0+
- Cortex-M3
- Cortex-M4
- Cortex-M7
FuSa RTS components
Arm FuSa RTS package contains following components:
- FuSa RTX RTOS: deterministic real-time operating system for Arm Cortex-M processors.
- FuSa Event Recorder: implements functionality to easily record events and collect execution statistics in the application code.
- FuSa CMSIS-Core: validated vendor-independent software interface to the processor resources.
- FuSa C library: a subset of the C library functions suitable for developing safety-critical embedded applications.
- Safety Package: documentation set explaining the usage of FuSa RTS in safety context.
Process Isolation
FuSa RTS contains protection mechanisms that control access to system resources (such as memory, peripherals, processor execution time). These process isolation capabilities prevent undesired interference between software elements of different safety integrity levels and allow building of mixed-criticality systems on a single-core microcontroller. FuSa RTS Process isolation is achieved with the following features:
| Feature | Description |
| Spatial Isolation | Spatial isolation is enforced by MPU Protected Zones that use processor’s Memory Protection Unit (MPU) to shield access to memory and peripherals. Access to RTOS objects and Kernel operations is additionally controlled with assigned Safety Classes. |
| Temporal Isolation | Temporal isolation is enabled with Thread Watchdog mechanisms that control the timing constraints in the system. |
| Controlled System Recovery | Controlled system recovery provides control over system operation in case of a failure and enables blocking the execution of non-safety components or proceeding to a safety state. |
