Building a safe and secure embedded world

Enablement of High Performance Cryptography

Highest Crypto Performance on Traveo II

  • Extremely lean implementation to achieve highest AES and CMAC performance
  • Utilizes crypto HW accelerator to full capacity
  • Low memory footprint

Facilitates HSM SW deployment

  • Abstraction APIs for easy third-party HSM SW integration
  • Ensures correct rollout of secure HSM domain to achieve spatial separation from application SW
  • Offers supervision of system services calls

Process and Quality

  • Developed in Automotive SPICE QM process
  • Compliant to MISRA C:2012 with AMD1 and SEI CERT C 2016
  • Implemented by experienced security SW team with close link to designers of cryptographic HW
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